Salary840,000 - 1,320,000 INR (PA)
Job TypeFull Time
Job Location Ghaziabad,Uttar Pradesh,India


Physical Design PNR Synthesis Floorplan STA
0 to 10 Years
Accounting / Audit / Taxation
Functional Area
R&D / Engineering Design
 Physical Design implementation of blocks, syb systems
- Perform Synthesis, Floorplan, placement, CTS, routing, STA, extraction, DRC, LVS
- Debug functional, timing, DRC, LVS issues
- Benchmark designs for performance analysis of standard cells
- Foundation IP knowledge - Logic, IO and Memory libraries
- Knowledge of EDA views, ability to debug lef, abstract, gds, OA, layout views
- Conformal LEC, clock domain crossing checks
- sdf back-annotation
- fully hands-on with Cadence tool flow for digital PnR, extraction, DRC, LVS
- knowledge of 140, 90, 65, 40nm process nodes
- Knowledge of Scripting and automation

Desired skills
- Chip/Top level floorplan, macro placement, IO ring construction, top level CTS, hierarchical design flow
- Low power physical design, knowledge of multiple power domains, handling cpf
- Design for test - scan insertion, scan chain stitching, atpg pattern generation, simulation
- IR drop analysis & substrate noise analysis
- Cadence tool knowledge of RTL compiler, DFM tools, apache's redhawk/totem
- Knowledge of 28/20nm nodes

Disha Career Services
Disha Career Services
Sector-63, Noida
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